New Samsung Static Ram Sets Standard for Cache Design

16-Bit-Wide Device Dramatically Simplifies Design of Low-Cost 386/486 PCs

SAN JOSE, Calif., December XX, 1992 -- Samsung Semiconductor today announced the industry's first word-wide 512-kilobit fully static random-access memory (SRAM). The KM616513, organized as 32,768 16-bit words, dramatically simplifies the design of cache memories for low-cost 386- and 486-based systems.

A single high-speed, low-power, KM616513 CMOS SRAM provides the optimal external memory cache for 386-based portable computers and low-end 486-based systems, replacing the two byte-wide parts currently used. With access times as fast at 17 nanoseconds, the KM616513 can provide low-cost zero-wait-state performance for systems with clock rates as high as 40 MHz, with even greater speeds possible using bank interleave designs.

"The simpler design and lower part counts offered by word-wide SRAMs will make them the new standard for PC cache designs," said Robert Eminian, Senior Manager for Samsung's memory marketing. "Manufacturers of economical 32-bit desktop and portable computers are no longer limited to designing this critical component with 8-bit parts.

The KM616513 provides a low-power single-chip solution ideal for battery-powered 386-based applications. The simpler design made possible by this word-wide part results in faster time to market, and the lower chip count reduces manufacturing costs, important factors in a highly competitive market.

New Cache Standard

The first in a family of word-wide SRAMs from Samsung, the KM616513 replaces two byte-wide components in 386 and 486 cache designs. It operates on a single 5-volt ±10% power supply, offers TTL-compatible inputs and outputs and three-state outputs, and is available with 25-, 20- and 17-nanosecond access times. The 17-nanosecond part draws a maximum of 180 milliamperes of current while active and 2 milliamperes in standby mode. All versions are available in a JEDEC standard 40-pin SOJ package (400 mil). A 15-nanosecond part is expected to be available in the first quarter of 1993.

In today's high-performance 386- and 486-based systems, the modest (ie. 60 to 70 nanosecond) access speeds of dynamic RAM limit system performance by making the CPU wait for the data stored there. Although too expensive to be used for a system's main memory, a small amount of fast static RAM acting as a cache buffer between the CPU and main memory reduces the CPU's need to access slow main memory, cost-effectively boosting overall system performance.

Until now, system designers were limited to 8-bit-wide static RAMs, requiring two chips for even the simplest caches. Larger cache designs required 16 or more chips, occupying more board real estate and consuming more power. Samsung's new 16-bit-wide static RAMs reduces the number of chips by half for an equivalent cache size, reducing space and power requirements and increasing reliability.

Pricing and Availability

Samsung's first 16-bit-wide fully static CMOS RAM, the KM616513, is available now in three access speeds. The 25-nanosecond version costs $11.00 each , the 20-nanosecond version costs $??.?? each and the 17-nanosecond version cost $??.?? each. The 15-nanosecond version, available first quarter 1993, will cost $14.50 each. All prices are for quantity 10,000. # # #